Wednesday, July 20, 2011

Exploring the 555: Why the 555's latch type is responsible for it's ability to function as a frequency divider

So I've done a fair bit of analysis of the canonical monostable multivibrator #circuit implemented via the 555 timer integrated circuit. I pretty much grok almost everything about it, with one problem. According to Wikipedia, the internal latch is an RS-latch, but based on its operation, {R,S}={1,1,} sets Q to 1, rather than toggling it or resulting in instability or oscillation.

Unfortunately, the schematic provided by National Semiconductor is a mess of transistors, and the corresponding component in the block diagram is labelled "flip-flop", with no intermediate block diagram or extra details concerning the type of flip-flop present at all.

Googling, however, reveals that it must be an S-latch, and indeed, the fact that the 555's latch is specifically an S-latch is vital to the operation of the Atari Punk Console, or any circuit that uses a monostable mode 555 as a frequency divider. It is not surprising that I can't find a design for such a frequency divider circuit that comes with a proper explanation.

The insides of a 555:

Anyway, the way that the 555 works is this:

  • The timing cycle is initiated by a certain voltage at the trigger input, TRG.
  • The timing cycle is terminated by a certain voltage at the threshold input, THR.
  • When the output is high, the discharge input, DIS, becomes grounded by a low impedance.
  • These aforementioned "certain voltages" are proportional to the common-cathode voltage, VCC, unless the control input, CTL, is used. The precise way in which it is affected requires too much mathematics for this blog post.
  • The reset input, RST, hard-resets the entire device.

The inputs that start and end the timing cycle, !TRG and THR, are fed directly to a type of circuit called a comparator. A comparator compares two voltages, and outputs either a high voltage or a low voltage, depending on which of the two input voltages are higher. One comparator compares THR to (2/3)*VCC. The other comparator compares (1/3)*VCC to TRG. These comparators detect when the timing cycle should be initiated or terminated by those "certain voltages" I was talking about.

The two comparators are connected to a latch. A latch is a circuit that "remembers" whether it's previous output was high or low if it is given no inputs. That is, you turn it on with a pulse to one input, and turn it off with a pulse to the other input. Between these pulses it remains on if the last pulse was to the S, "set", input and remains off if the last pulse was to the R, "reset" input.

Here is the actual monostable circuit:

In monostable operation, nothing happens until TRG falls below (1/3)*VCC. This comparator is connected to the "set" input of the S-latch, which turns the latch on. The latch remains on whether the "set" input is left on or off, until the "reset" input of the latch is enabled. This input is connected to the other comparator, and therefore the latch is reset only when THR rises above (2/3)*VCC.

The operation depends on two external elements, a resistor and a capacitor. A capacitor is like a tank that holds electrons. If you put a bunch of electrons in it, then its voltage rises. If you let the electrons out, its voltage falls. A resistor acts like a valve that controls the rate that the electrons enter the capacitor. If the capacitor was connected to ground, all of the electrons would leave immediately. If it was connected to a battery, as many electrons could fit inside the capacitor at that voltage would enter it immediately. But through a resistor, it charges or discharges more slowly, at a very specific rate.

(This rate can be found by solving this first-order differential equation:)

C\frac{dV}{dt} + \frac{V}{R}=0

The way that THR's voltage changes, and the existence of DIS, is what causes the circuit to be a timer, rather than just a flip-flop with analog inputs. When the output is low, DIS shorts the capacitor to ground, and all the electrons leave immediately, but when the output is high, the capacitor is charged via the resistor, and THR takes a certain number of seconds to reach (2/3)VCC. By setting THR equal to the capacitor's voltage, a negative pulse of any relatively short duration at TRG is converted to a positive pulse of a precise, constant duration dependent only on the values of the resistor and the capacitor.

Enjoy this graph:By "relatively short", I mean shorter than the time it takes for the capacitor to charge from it's initial voltage to (2/3)VCC. If it's longer, then the output pulse will be exactly the same length as the input pulse. This characteristic is precisely what allows this implementation of a monostable multivibrator to function as a frequency divider, and is due to the fact that the latch must be implemented such that {R,S} = {1,1} is hardwired to result in Q = 1.

1 comment:

  1. The monostable circuit and 555 insides pictures aren't loading. :(